Phase-look loops (also sometimes referred to as phase-looked loops) are well-known circuits. Conventionally used as a clock-frequency generator in telecommunications systems, a phase-look loop locally generates an output signal stream that is referenced to or looked to (i.e., that tracks) a remotely-supplied reference input signal stream, in both frequency and phase. Both analog and digital implementations of phase-look loops are well known.
The basic configuration of a phase-look loop includes an oscillator that generates the local output signal. The oscillator output is fed as an input to a phase comparator, along with the remote reference signal. Output of the phase comparator, which is representative of the frequency and phase difference of its two inputs, is fed to a controller that converts this difference signal into a control signal for the oscillator. Under influence of the control signal, the output of the oscillator is adjusted to track the remotely-supplied reference input signal.
Conventionally, upon power-up (start-up) of the phase-look loop and before it has had time to look onto the reference input signal, or upon loss of the reference input signal following the phase-look loop having looked thereunto, the phase-look loop has been operated in a "free running" mode. That is, the output signal generated by the phase-look loop has been the output of the oscillator operating free of any adjustment to its operation being made by the controller. For the output of the phase-look loop to be useful while "free running", it has been necessary to use a very precise and stable oscillator that could be depended upon to independently operate very precisely at the reference signal's frequency, and to not drift in frequency and phase over very long periods of time (e.g., years). However, such oscillators are very expensive.
To avoid the use of a very expensive oscillator yet still ensure that the phase-look loop output remains stable during temporary loss of the reference input signal, a capability known as "holdover" has been developed and is well-known in the art. This capability involves temporarily latching the control signal generated by the controller immediately prior to the loss of the reference input signal, and continuing to use the latched control signal to control the output of the oscillator during the time period when the reference input signal is not available. However, the "holdover" capability has done nothing to solve the problem of "free running" operation of a phase-lock loop with an inexpensive--imprecise and unstable--oscillator during power-up, and particularly during power-up in the absence of the reference input signal, because a "holdover" control signal is not available to the phase-lock loop at power-up, and thereafter until the reference input signal becomes available. Consequently, the problems that result from operating a phase-lock loop with an imprecise and unstable oscillator have not been fully solved by the prior art.